Showing posts with label digital. Show all posts
Showing posts with label digital. Show all posts

Thursday, November 6, 2014

Digital Dice With 7 Segment Display

A digital dice circuit can be easily realised using an astable oscillator circuit followed by a counter, display driver and a display. Here we have used a timer NE555 as an astable oscillator with a frequency of about 100 Hz. Decade counter IC CD4026 or CD4033 (which-ever available) can be used as counter-cum-display driver. When using CD4026, pin 14 (cascading output) is to be left unused (open), but in case of CD4033, pin 14 serves as lamp test pin and the same is to be grounded.
Circuit diagram :

Digital Dice With 7-Segment Display Circuit diagram

The circuit uses only a handful of components. Its power consumption is also quite low because of use of CMOS ICs, and hence it is well suited for battery operation. In this circuit two tactile switches S1 and S2 have been pro-vided. While switch S2 is used for initial resetting of the display to ‘0,’ depression of S1 simulates throwing of the dice by a player. 

When battery is connected to the circuit, the counter and display section around IC2 (CD4026/4033) is energised and the display would normally show ‘0’, as no clock input is available. Should the display show any other decimal digit, you may press re-set switch S2 so that display shows ‘0’. To simulate throwing of dice, the player has to press switch S1, briefly. This ex-tends the supply to the astable oscillator configured around IC1 as well as capacitor C1 (through resistor R1), which charges to the battery voltage. Thus even after switch S1 is released, the astable circuit around IC1 keeps producing the clock until capacitor C1 discharges sufficiently. Thus for du-ration of depression of switch S1 and discharge of capacitor C1 thereafter, clock pulses are produced by IC1 and applied to clock pin 1 of counter IC2, whose count advances at a frequency of 100 Hz until C1 discharges sufficiently to deactivate IC1. 

When the oscillations from IC1 stop, the last (random) count in counter IC2 can be viewed on the 7-segment display. This count would normally lie between 0 and 6, since at the leading edge of every 7th clock pulse, the counter is reset to zero. This is achieved as follows. 

Outputs

Observe the behavior of ‘b’ segment output in the Table. On reset, at count 0 until count 4, the segment ‘b’ output is high. At count 5 it changes to low level and remains so during count 6. However, at start of count 7, the output goes from low to high state. A differentiated sharp high pulse through C-R combination of C4-R5 is applied to reset pin 15 of IC2 to reset the output to ‘0’ for a fraction of a pulse period (which is not visible on the 7-segment display). Thus, if the clock stops at seventh count, the display will read zero. There is a probability of one chance in seven that display would show ‘0.’ In such a situation, the concerned player is given an-other chance until the display is non-zero. 

Note.  Although it is quite feasible to inhibit display of ‘0’ and advance the counter by ‘1,’ the same makes the circuit somewhat complex and there-fore such a modification has not been attempted.
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Friday, October 31, 2014

Digital Step Km Counter Circuit Diagram

This circuit measures the distance covered during a walk. Hardware is located in a small box slipped in pants pocket and the display is conceived in the following manner: the leftmost display D2 (the most significant digit) shows 0 to 9 Km. and its dot is always on to separate Km. from hm. The rightmost display D1 (the least significant digit) shows hundreds meters and its dot illuminates after every 50 meters of walking. A beeper (excludable), signals each count unit, occurring every two steps. A normal step was calculated to span around 78 centimeters, thus the LED signaling 50 meters illuminates after 64 steps (or 32 operations of the mercury switch), the display indicates 100 meters after 128 steps and so on.

For low battery consumption the display illuminates only on request, pushing on P2. Accidental reset of the counters is avoided because to reset the circuit both pushbuttons must be operated together. Obviously, this is not a precision meter, but its approximation degree was found good for this kind of device. In any case, the most critical thing to do is the correct placement of the mercury switch inside of the box and the setting of its sloping degree.

Digital Step-Km Counter Circuit diagram:


digital_step_km_counter_circuit_diagram
Digital Step-Km Counter Circuit Diagram



Parts:
R1 = 22K 1/4W Resistor
R2 = 2.2M 1/4W Resistor
R3 = 22K 1/4W Resistor
R4 = 1M 1/4W Resistor
R5 = 4.7K 1/4W Resistor
R6 = 47R 1/4W Resistor
R7 = 4.7K 1/4W Resistor
R8 = 4.7K 1/4W Resistor
R9 = 1K 1/4W Resistor
C1 = 47nF 63V Polyester Capacitor
C2 = 100nF 63V Polyester Capacitor
C3 = 10nF 63V Polyester Capacitor
C4 = 10µF 25V Electrolytic Capacitor
D1 = Common-cathode 7-segment LED mini-display (Hundreds meters)
D2 = Common-cathode 7-segment LED mini-display (Kilometers)
Q1 = BC327 45V 800mA PNP Transistors
Q2 = BC327 45V 800mA PNP Transistors
P1 = SPST Pushbutton (Reset)
P2 = SPST Pushbutton (Display)
IC1 = 4093 Quad 2 input Schmitt NAND Gate IC
IC2 = 4024 7 stage ripple counter IC
IC3 = 4026 Decade counter with decoded 7-segment display outputs IC
IC4 = 4026 Decade counter with decoded 7-segment display outputs IC
SW1 = SPST Mercury Switch, called also Tilt Switch
SW2 = SPST Slider Switch (Sound on-off)
SW3 = SPST Slider Switch (Power on-off)
BZ = Piezo sounder
B1 = 3V Battery (2 AA 1.5V Cells in series)

Circuit operation:

IC 1A & IC 1B form a monostable multi vibrator providing some degree of freedom from excessive bouncing of the mercury switch. Therefore a clean square pulse enters IC2 that divides by 64. Q2 drives the LED dot-segment of D1 every 32 pulses counted by IC2. Either IC3 & IC4 divide by 10 and drive the displays. P1 resets the counters and P2 enables the displays. IC1C generates an audio frequency square wave that is enabled for a short time at each monostable count. Q1 drives the piezo sounder and SW2 allows disabling the beep.

Notes:
  • Experiment with placement and sloping degree of mercury switch inside the box: this is very critical.
  • Try to obtain a pulse every two walking steps. Listening to the beeper is extremely useful during setup.
  • Trim R6 value to change beeper sound power.
  • Push P1 and P2 to reset.
  • This circuit is primarily intended for walking purposes. For jogging, further great care must be used with mercury switch placement to avoid undesired counts.
  • When the display is disabled current consumption is negligible, therefore SW3 can be omitted.
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Thursday, October 23, 2014

Digital Thermometer 0 100 0°Celsius

Digital Thermometer 0-100.0°Celsius
Digital Thermometer 0-100.0 ° C is a digital thermometer that operates in mode temperature measurement in Celsius (° C). Digital Thermometer 0-100.0 ° C in this article using the form data processing microcontroller AT89C4051.
Temperature sensors used in Digital Thermometer 0-100.0 ° C. This temperature sensor LM35D. Digital Thermometer 0-100.0 ° C. It uses the temperature measurement data viewer in the form of 1 line LCD viewer. Digital Thermometer 0-100.0 ° C. It can display the temperature measurement data with a resolution of 0.1 ° C.
Digital Thermometer 0-100.0 ° C 






Digital Thermometer 0-100.0 ° C. These temperature sensors make use of LM35D as temperature sensing. In Digital Thermometer 0-100.0 ° C. This temperature sensor measurement data this LM35D (Level Voltage) is then converted into 4-bit binary data using the ADC CA3162. Then the 4-bit data from ADC CA3162 which is a measurement of data if the temperature is in the AT89C4951 microcontroller so that it becomes an operating principle of temperature measurement based on digital thermometers. In the final stage of the Digital Thermometer 0-100.0 ° C. These data digitla adlah appearance temperature measurement, using digital data viewer of the LCD 1 line.
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Thursday, September 25, 2014

Digital Voltmeter and Ammeter Circuit Module

  1. This V/I display module is eminently suitable for building into an existing DC power supply, where it gives a precise indication of the set voltage or the current consumption of the load.
  1. In the voltage range, the decimal point lights on LD3, and the resolution is therefore 100 mV Two current ranges are possible: 0-9.99 A (link a) or 0-0.999 (.999) A (link b).
  2. The 3-digit readout is based on A/D converter Type CA3l62 and BCD-to-7 segment decoder Type CA3l6l, both from RCA.
  3. The resulting small negative deviation in the volt- age range is compensated by P2.
  4. These points should be adjusted in the above order. Two presets, P1 and P3, are required to ensure correct nulling of the module. P1 compensates for the quiescent current consumption of the regulator circuit in the supply.
  5. When voltage measurement is selected, P4-R1 attenuates the input voltage by a factor 100. Also, point D is pulled low so that the decimal point on the LS display, and the
  6. The current sensing resistor is therefore either 0Rl or lR0. It is important that Rs does not affect the output volt- age of the supply in question.
  7. When current measurement is selected, the drop across the sensing resistor is applied direct to the HI-LO inputs of DAC IC1.
  8. The sensing resistor has such a low value as to render the voltage divider ineffective. There are four adjustment points in the module: P1: current range nulling; P2: full-scale current calibration; P3: voltage range nulling; P4: full-scale voltage calibration.
  9. The V/I display module is conveniently fed from the unregulated voltage available in the supply (max. 35 V) see points E and F in Fig. 2; bridge rectifier B1 may then be omitted.
  10. It must, therefore, be fitted ahead of the voltage divider that controls the output voltage. DPDT switch S1 selects between l voltage and current readings.

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Wednesday, September 24, 2014

Digital Logic Tester Probe Circuit

This is not our first high and low tester, but the present circuit offers something new: a seven-segment display which shows ’H’ or ’L’ and at the same time a small loudspeaker , emits a corresponding tone.
And all that at very reasonable cost. When the supply is switched on, the decimal point of the display lights and indicates that the unit is ready i for use. If this is not the case, 0r an undefined signal is applied to the input, the display, apart from the decimal point, remains dark and the loudspeaker remains silent. If the input signal is logic 0, the display shows ’L and the loudspeaker emits a low note. When the input signal is logic 1, the display shows H’ and the loudspeaker emits a note which is an octave higher than the low tone. Operation of the circuit can be seen from the circuit diagram in figure 1 and the truth table in figure 2. When the input signal is 1, transistor T1 conducts taking the input of gate N2 above the trigger threshold and the trigger output goes to logic O. Transistor T2 (PNP!) is cut off, the input of gate N1 is also above the trigger threshold and this trigger output is therefore also logic 0. Both switching transistors T3 and T4 are off and a current flows through the corresponding segments (b, c, e, f, g), diodes D4 and D5 and R7. When the input signal is logic O, T1 is cut off and T2 conducts. The voltage at the inputs of gates N1 and N2 are below the trigger threshold and both outputs are logic 1, switching on transistors T3 and T4; the emitter voltage of T4 rises and cuts off diodes D4 and D5. This causes a current to flow through segments d, e and f, diodes D2 and D3, resistor R6 and transistor T3. With non—defined inputs (between 0.8.. . 2.15 V) and an open circuit input, both input transistors are cut off. The output of N1 is then logic O and that of N2 is logic 1: no current can therefore flow through any of the segments. As regards the drive for the two oscillators, suffice it to say that during low inputs N3 is driven by the output of N1 and during high in- puts N4 is driven directly by T1. lf required, the loudspeaker can be switched on by means of S1. The switch can, of course, be omitted_if the audio tone is always required. If you have an ear for music, R10 and R12 may be replaced by a 220 Q. resistor and a 250 SZ preset potentiometer so that the tone can be adjusted to your particular liking.!



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Friday, June 6, 2014

DIGITAL AUDIO VIDEO INPUT SELECTOR

Need to connect more than one audio-video (AV) source to your colour television? Don’t worry, here’s an AV input expander for your TV. It is inexpensive and easy to construct.

The working of the circuit is simple and straightforward. Whenever 12V DC is applied to the circuit, power-on LED1 glows. Now reset the decade counter by momentarily pressing switch S2 to make Q0 output of IC1 high. LED2 glows to indicate that the circuit is ready to work.Switch S1 is used for selecting a particular audio-video (AV) signal. To select the first AV signal, press switch S1 once. To select the second AV signal, press switch S1 twice. In the same way, you can select the other two signals.

DIGITAL AUDIO/ VIDEO INPUT SELECTOR CIRCUIT DIAGRAM



Momentarily pressing of switch S1 once results in clocking of the decade counter and relay driver transistor T1 conducts to energise relay RL1. Now normally opened (N/O) contacts of two-changeover relay RL1 connect the television set’s inputs to the first AV signal (marked as Video-In 1 and Audio-in 1). LED3 glows to indicate this.

When you press switch S1 twice, the Q2 output of IC1 goes high. Consequently, 2C/O relay RL2 (not shown in the circuit) energises and television inputs are connected to the second AV signal (not shown in the figure). LED4 (not shown in figure) glows to indicate this.

Similarly, pressing switch S1 thrice makes the Q3 output of IC1 high. Consequently, 2C/O relay RL3 (not shown in the figure) energises and the television inputs are connected to the third AV signal source. LED5 (not shown in the figure) glows to indicate this. Again, pressing switch S1 four times makes the Q4 output of IC1 high. Consequently, 2C/O relay RL4 energises and the TV inputs are connected to the fourth AV signal source (marked as Video-in 4 and Audio-in 4). LED6 glows to indicate this.

Further pressing of switch S1 resets the decade counter and LED2 glows again. Thereafter, the cycle repeats. The circuit is wired for four-input selection, therefore the Q5 output of IC1 is connected to reset pin 15 of IC1.

Enclose the assembled PCB along with the relays in a cabinet with the input/output sockets and indicators mounted on the body of the cabinet.

Author:  T.K. HAREENDRAN
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Monday, December 23, 2013

Digital Fan Regulator

The circuit presented here can be used to control the speed of  fans using induction motor. The speed control is nonlinear, i.e. in steps. The current step number is displayed on a 7-segment display. Speed can be varied over a wide range because the circuit can alter the voltage applied to the fan motor from 130V to 230V RMS in a maximum of seven steps.  The triac used in the final stage is fired at different angles to get different voltage outputs by applying short-dura-tion current pulses at its gate. For this pur-pose a UJT relax-ation oscillator is used that outputs sawtooth waveform. This waveform is coupled to the gate of the triac through an optocoupler (MOC3011) that has a triac driver output stage.

Pedestal voltage control is used for varying the firing angle of the triac. The power supply for the relaxation oscillator is derived from the rectified mains via 10-kilo-ohm, 10W series dropping/limit-ing resistor R2.  The pedestal voltage is derived from the non-filtered DC through optocoupler 4N33. The conductivity of the Darlington pair transistors inside this optocoupler is varied for getting the pedestal voltage. For this, the positive sup-ply to the LED inside the optocoupler is connected via different values of resistors using a multiplexer (CD4051).

Digital Fan Regulator Circuit diagram:
Digital Fan Regulator Circuit Diagram

The value of resistance selected by the multiplexer depends upon the control in-put from BCD up-/down-counter CD4510 (IC5), which, in turn, controls forward bi-asing of the transistor inside optocoupler 4N33. The same BCD outputs from IC5 are also connected to the BCD-to-7-seg-ment decoder to display the step number on a 7-segment display.  NAND gates N3 and N4 are config-ured as an astable multivibrator to produce rectangular clock pulses for IC5, while NAND gates N1 and N2 generate the active-low count enable (CE) input using either of push-to-on switches S1 or S2 for count up or count down operation, respectively, of the BCD counter.

Optocoupler 4N33 electrically isolates the high-voltage section and the digital section and thus prevents the user from shock hazard when using switches S1 and S2. BCD-to-7-segment decoder CD4543 is used for driving both common-cathode and common-anode 7-segment displays. If phase input pin 6 is ‘high’ the decoder works as a common-anode decoder, and if phase input pin 6 is ‘low’ it acts as a common-cathode decoder.  Optocoupler 4N33 may still conduct slightly even when the display is zero, i.e. pin 13 (X0, at ground level) is switched  output pin 3. To avoid this problem, adjust preset VR1 as required using a plastic-handled screwdriver to get no output at zero reading in the display.

Source :  http://www.ecircuitslab.com/2011/10/digital-fan-regulator.html






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